FLIP-FLOPS AND RELATED DEVICES

Objective Questions

Short notes

Objective questions (Answers are given below)

If a NAND latch has a 1 on the SET input and
a 0 on the CLEAR input, then the SET input
goes to 0, the latch will be:
(a) HIGH (b) LOW
(c) Invalid (d) None of these
The invalid state of a NAND latch occurs when
(a) S = 1, C = 0
(b) S = 0, C = 1
(c) S = 1, C = 1
(d) S = 0, C = 0
The invalid state of a NOR latch occurs
when
(a) S = 1, C = 0
(b) S = 0, C = 1
(c) S = 1, C = 1
(d) S = 0, C = 0
Like a latch, the flip-flop belongs to a category
of logic circuits known as
(a) monostable multivibrators
(b) astable multivibrators
(c) bistable multivibrators
(d) none of these
Which of the following flip-flops is used as a
latch?
(a) J-K flip-flop
(b) S-C flip-flop
(c) D flip-flop
(d) T flip-flop
A flip-flop which can have an uncertain output
state is :
(a) J-K flip-flop
(b) S-C flip-flop
(c) D flip-flop
(d) T flip-flop
The purpose of a clock input to a flip-flop is to
(a) clear the device
(b) set the device
(c) always cause the output to change the
states
(d) cause the output to assume a state
dependent on the controlling (S – C, J-K
or D) inputs.
A feature that distinguishes the J-K flip-flop
from an S-C flip-flop is the
(a) toggle condition
(b) preset input
(c) type of clock
(d) clear input.
A J-K flip-flop is in the toggle condition when
(a) J = 1, K = 0
(b) J = 1, K = 1
(c) J = 0, K = 0
(d) J = 0, K = 1
A J-K flip-flop with J = 1 and K = 1 has a 10
kHz clock input. The Q = output is,
(a) constantly LOW

(b) constantly HIGH
(c) a 5 kHz square wave
(d) a 10 kHz square wave

For an edge-triggered D flip-flop,
(a) a change in the state of the flip-flop can
occur only at a clock pulse edge
(b) the state that flip-flop goes to depends on
the D input
(c) the output follows the input at each clock
pulse
(d) all of these answers
The flip-flop shown in Fig. 72.109 logically
behaves as
(a) a D flip-flop (b) a J-K flip-flop
(c) a T flip-flop (d) an R-S flip-flop
Fig. 72.109
(Grad. I.E.T.E. June, 1997)
A J-K flip-flop is a device to
(a) divide the frequency by 2
(b) divide the frequency by 4
(c) generate waveform of same frequency as
that of the input
(d) cannot be used for frequency division.
A 1 μs pulse can be converted into a 1 ms pulse
by using
(a) a monostable multivibrator
(b) an astable multivibrator
(c) a bistable multivibrator
(d) a J-K flip-flop
(U.P.S.C. Engg. Services, 1999)
The following is not a sequential circuit
(a) J-K flip-flop (b) counter
(c) full-adder (d) shift register
(Dip. I.E.T.E., Dec. 1996)
A one = shot is a type of
(a) monostable multivibrator
(b) astable multivibrator
(c) bistable multivibrator
(d) timer
An astable multivibrator
(a) requires a periodic trigger input
(b) has one stable states
(c) is an oscillator
(d) produces a non-periodic pulse output.
A 1 msec pulse can be converted to a 10 msec
pulse by using:
(a) an astable multivibrator
(b) a monostable multivibrator
(c) a bistable multivibrator
(d) a J-K flip-flop
(U.P.S.C. Engg. Services 1990)
A retriggerable one shot is one which
(a) can be triggered only once
(b) has two quassi-stable states
(c) cannot be triggered until full pulse has
been outputted.
(d) is capable of being triggered while the
output is being generated.